1. Field of the Invention
The present invention relates to a reference current generating circuit, and more specifically to a reference current generating circuit suitable to be incorporated in a MOS semiconductor integrated circuit.
2. Description of Related Art
In the prior art, for example, Japanese Patent Application Laid-open Publication No. JP-A-59-066725 proposed a reference current generating circuit (constant current circuit) as shown in FIG. 1.
The shown prior art constant current circuit includes a differential amplifier 11 having a non-inverting input (+) connected to receive an input reference voltage V0, an NMOS transistor (N-channel metal-oxide-semiconductor field effect transistor) 12 having a gate connected to an output of the differential amplifier 11 and a source connected to an inverting input (xe2x88x92) of the differential amplifier 11, and a constant current generating reference resistor 13 having a resistance R0 having one end connected at a connected node xe2x80x9caxe2x80x9d between the source of the transistor 12 and the inverting input of the differential amplifier 11. The other end of the resistor 13 is grounded. A drain of the transistor 12 is connected to a constant current output OUT2.
Assuming that the reference voltage V0 is applied to the non-inverting input of the differential amplifier 11, a potential of the node xe2x80x9caxe2x80x9d becomes V0 because of a feedback action, and therefore, a current I0 flowing through the constant current output OUT2 becomes as follows:
I0=V0/R0
In this type of the constant current circuit, since the current value I0 is determined by the reference voltage value V0 and the resistance value R0 of the constant current generating reference resistor 13, it is possible to relatively easily set the constant current value I0.
In general, due to a process variation in a conventional semiconductor device manufacturing process, and due to an ambient temperature variation, large variation or fluctuation occurs in a threshold level VT and other characteristics of MOS transistors and a resistance value of diffused resistors.
Because of this reason, in order to realize a precise reference current value in the reference current generating circuit shown in FIG. 1, it has been necessary to externally mount the constant current generating reference resistor 13. As a result, the number of parts is inevitably increased in the conventional reference current generating circuit, which is not convenient to the integrated circuit.
On the other hand, a precision resistor itself is expensive, and therefore, in order to obtain a high precise reference current, the conventional reference current generating circuit inevitably becomes expensive.
Furthermore, since the integrated circuit is required to have output terminals for the external resistor, the number of output terminals of the integrated circuit is increased as a matter of course.
Assuming that the constant current generating reference resistor 13 is internally formed in the integrated circuit in the form of a diffused resistor, in place of the external resistor, it is not possible to realize a precise reference current generating circuit because the variation of the resistance of the diffused resistor dependent upon a temperature change is large if an internal resistor was simply formed in the inside of the integrated circuit.
Accordingly, it is an object of the present invention to provide a reference current generating circuit which has overcome the above mentioned defects of the conventional circuit.
Another object of the present invention is to provide a reference current generating circuit suitable to be incorporated in a MOS semiconductor integrated circuit and capable of generating a precise reference current without being influenced by variation of the threshold VT of the transistor and a temperature change.
The above and other objects of the present invention are achieved in accordance with the present invention by a reference current generating circuit comprising a reference voltage generating means, a resistor ladder circuit connected to the reference voltage generating means and having a predetermined number of taps for outputting a corresponding number of different divided voltages obtained from a voltage generated by the reference voltage generating means, a control circuit connected to the predetermined number of taps of the resistor ladder circuit, for outputting a selected divided voltage of the different divided voltages, and a MOS transistor having a gate connected to receive the selected divided voltage and a source connected to a reference power supply terminal, a current flowing through a drain of the MOS transistor being extracted as an output reference current.
With the above mentioned arrangement, the gate voltage of the MOS transistor is controlled by the control circuit to a level which enables the MOS transistor to generate a desired constant current, by selecting one of a plurality of different divided voltages obtained by the resistor ladder circuit from the reference voltage generated by the reference voltage generating means. Accordingly, a reference current generating circuit can be realized, which is capable of supplying a reference current having a high precision and a high stability in relation to a variation of the threshold VT of the MOS transistor caused by a variation in the manufacturing process and a temperature change. On the other hand, an external resistor, which was required in the prior art reference current generating circuit, becomes unnecessary. Therefore, the reference current generating circuit in accordance with the present invention is suitable to be incorporated in an integrated circuit, and can reduce the cost of the semiconductor device.
The above and other objects, features and advantages of the present invention will be apparent from the following description of preferred embodiments of the invention with reference to the accompanying drawings.